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| 02W139A Clock generator for DVD BU2362FV Description BU2362FV is a high-performance 2-channel PLL integrated Circuit. PLL circuit generates necessary clocks by inputting standard clocks of crystal oscillator from outside. Frequency can be changed by the internal dividing control. Dimension (Unit : mm) 5.0 0.2 1.15 0.1 6.4 0.3 0.1 4.4 0.2 16 9 1 8 0.15 0.1 0.1 0.65 0.22 0.1 Features 1) Generate Sound clock (44.1k, 48k) from basic video clock 2) No external element required for PLL 3) 3.3V single power supply (2.7V~3.6V operation) 4) -25C ~ 85C operation 5) SSOP-B16 package SSOP-B16 Applications DVD-P, DVD-R, DVD-R/W, DVC DVD car navigation (Expanded operating temperature range for car navigation: -25C ~ 85C) DVD camcoder (Low power operation (3.0V0.3V) for portable appliances) Absolute Maximum Ratings (Ta=25C) Parameter Applied voltage Input voltage Storage temperature range Power dissipation Derating : 4.5mW/C for operation above Ta=25C Symbol VDD VIN Tstg Pd -0.5 -0.5 -30 Limits ~ ~ ~ Unit V V +7.0 VDD+0.5 +125 C mW 450 December, 2002 0.3Min. Recommended Operating Conditions (Ta=25C) Parameter Supply voltage Input H voltage range Input L voltage range Operating temperature range Output load Symbol VDD VIH VIL Topr CL Min. 2.7 0.8VDD 0.0 -25 Typ. Max. 3.6 VDD 0.2VDD 85 15 Unit V V V C pF Electrical characteristics (Unless otherwise noted; Ta=25C, VDD=3.3V, Crystal frequency=27MHz) Parameter Output H voltage Output L voltage Operating circuit current CLK512FS CLKA CLK36M CLK33M CLK16M CLK27M Symbol VOH VOL IDD CLK512-A CLK512-B CLKA-A CLKA-B CLK36M CLK33M CLK16M CLK27M Min. 24 Typ. 35 22.5792 24.5760 16.9344 36.8640 36.8640 33.8688 16.9344 27.0000 Max. 0.4 45 Unit V V mA MHz MHz MHz MHz MHz MHz MHz MHz Conditions IOH=-4.0mA IOL=-4.0mA No load FSEL1=OPEN, Xtal *3136/625/6 FSEL1=L, Xtal *2048/375/6 FSEL1=OPEN, Xtal *3136/625/8 FSEL1=L, Xtal *2048/375/4 Xtal *3136/625/4 Xtal *3136/625/8 Xtal Xtal *2048/375/8 Note) Output frequency is determined by the operation expression of frequency inputted to Xtal IN. Output (when input 27MHz) is shown above. Application Circuit 1 2 27MHz 3 4 5 6 27MHz 7 8 VDD2 CLK36M 16 15 14 13 12 11 10 9 36.8640MHz 33.8688MHz H:44.1kHz mode L:48kHz mode 16.9344MHz VSS2 CLK33M CLK27M FSEL1 TEST CLK16M AVDD DVDD AVSS DVSS XTALOUT CLK512FS 22.5792MHz or 24.567MHz 16.9344MHz or 36.864MHz XTALIN BU2362FV CLKA Note) The BU2362FV is basically placed on the board. Capacitance(0.1F) need to be placed between pin1(VDD2) and pin2(Vss2), pin5(AVDD) and pin6(AVss), pin11(DVss) and pin12(DVDD). To obtain accurate frequency, some capacitance( F) need to be placed nearly between pin7 and GND, pin8 and GND. In certain condition of the board, the electrolytic capacitor may need to be placed between power supply and GND. As a measure against EMI, it is effective to place ferrite beads on the starting point of power supplied from the board to BU2362FV, and to use selected bypass capacitor(1 or less) between power supply and GND that can reduce high frequency noise. |
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